ADM-XRC SDK 2.7.0b1 User Guide (Linux)
© Copyright 2001-2007 Alpha Data


Introduction to the local bus

This section provides a brief primer to the protocol used on the local bus common to the Alpha Data Xilinx Reconfigurable Coprocessor range. The key features of the local bus are:

The differences between the models in the ADM-XRC range can be summarized by the following table:

Feature ADM-XRC
ADM-XRC-P
ADM-XRC-II-Lite ADM-XRC-II
FPGA technology Virtex
Virtex-E
Virtex-EM
Virtex-II Virtex-II
Memory technology ZBT SSRAM ZBT SSRAM ZBT SSRAM
Max. local bus frequency 40.0MHz 40.0MHz 66.67MHz
Multiplexed address/data on local bus No No No
Supported data widths on local bus 32 bits 32 bits 32 bits
PCI to local bus bridge PCI9080 PCI9080 PCI9656

Feature ADP-DRC-II ADP-WRC-II ADM-XPL
FPGA technology Virtex-II Virtex-II Virtex-II Pro
Memory technology DDR SDRAM DIMM
DDR-II SSRAM
DDR SDRAM DDR SDRAM
ZBT SSRAM
Max. local bus frequency 66.67MHz 66.67MHz 80.0MHz
(see note 1 below)
Multiplexed address/data on local bus No No Yes
Supported data widths on local bus 32 bits 32 bits 32 bits
64 bits
PCI to local bus bridge PCI9656 PCI9656 Virtex-II

Feature ADM-XP ADP-XPI ADM-XRC-4LX
FPGA technology Virtex-II Pro Virtex-II Pro Virtex-4 LX
Memory technology DDR SDRAM
DDR-II SSRAM
DDR SDRAM DIMM
DDR-II SSRAM
ZBT SSRAM
Max. local bus frequency 80.0MHz 80.0MHz 66.67MHz
Multiplexed address/data on local bus Yes Yes No
Supported data widths on local bus 32 bits
64 bits
32 bits
64 bits
32 bits
PCI to local bus bridge Virtex-II Virtex-II PCI9656

Feature ADM-XRC-4SX ADM-XRC-4FX ADM-XRC-5LX
FPGA technology Virtex-4 SX Virtex-4 FX Virtex-5 LX
Memory technology ZBT SSRAM DDR-II SDRAM DDR-II SDRAM
Max. local bus frequency 66.67MHz 80.0MHz 80.0MHz
Multiplexed address/data on local bus No Yes Yes
Supported data widths on local bus 32 bits 32 bits
64 bits
32 bits
64 bits
PCI to local bus bridge PCI9656 Virtex-4 Virtex-4

Feature ADM-XRC-5T1
FPGA technology Virtex-5 LXT
Virtex-5 SXT
Memory technology DDR-II SDRAM
DDR-II SSRAM
Max. local bus frequency 80.0MHz
Multiplexed address/data on local bus Yes
Supported data widths on local bus 32 bits
64 bits
PCI to local bus bridge Virtex-4

Note 1: If logic revision from INFO utility is 1.2 or greater, max. LCLK frequency is 80MHz; otherwise 66.67MHz.

Click on one of the following topics for more information:

Local bus signals

Direct slave transfers

DMA transfers

Arbitration

Direct master transfers

Tips on local bus interface design

 


 Top of page