ADM-XRC SDK 2.4.0 User Guide (Linux)
© Copyright 2001-2004 Alpha Data
XRC | XRC-P | XRCII-Lite | XRCII | XRCIIPro-Lite | WRCII | DRCII | XRCIIPro |
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$ADMXRC_SDK4/fpga/verilog/frontio
The FrontIO FPGA design simply outputs a walking '1' bit on the front panel I/O pins.
The FrontIO design does not have a local bus interface; thus there are no registers defined in the FPGA space.
For a list of the Verilog source files, refer to the appropriate XST project file, as referenced in the following table:
Model | XST script file | XST project file | UCF file |
XRC with Virtex | frontio-xrc-v.scr | frontio-xrc-v.prj | frontio-xrc.ucf |
XRC with Virtex-E | frontio-xrc-ve.scr | frontio-xrc-ve.prj | frontio-xrc.ucf |
XRCII-Lite | frontio-xrc2l-v2.scr | frontio-xrc2l-v2.prj | frontio-xrc2l.ucf |
XRCII | frontio-xrc2-v2.scr | frontio-xrc2-v2.prj | frontio-xrc2.ucf |
Project Navigator projects can be found in the projnav directory as follows:
Model | Project Navigator project file |
XRC | projnav/xrc/<device> |
XRCII-Lite | projnav/xrc2l/<device> |
XRCII | projnav/xrc2/<device> |