ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data


FrontIO sample Verilog FPGA design

Verilog source files

Source files required for supported cards

The FrontIO FPGA design simply outputs a walking '1' bit on the front panel I/O pins.

Runs on

ADM-XRC, ADM-XRCII-Lite, ADM-XRCII

Verilog source files

Filename Description
frontio\frontio.v Top level of design

Source files required for supported cards (top level in bold)

Card Source files UCF file
ADM-XRC frontio\frontio-xrc.v frontio\frontio-xrc.ucf
ADM-XRCII-Lite frontio\frontio-xrc2l.v frontio\frontio-xrc2l.ucf
ADM-XRCII frontio\frontio-xrc2.v frontio\frontio-xrc2.ucf