ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data
RearIO sample VHDL FPGA design
Source files required for supported cards
The RearIO FPGA design simply outputs a walking '1' bit on the rear panel I/O pins.
Runs on
ADM-XRC-P, ADM-XRCII
VHDL source files
Filename | Description |
reario\reario-xrcp.vhd | Top level of design for ADM-XRC-P only |
reario\reario-xrc2.vhd | Top level of design for ADM-XRCII only |
Source files required for supported cards (top level in bold)
Card | Source files | UCF file |
ADM-XRC-P | reario\reario-xrcp.vhd | reario\reario-xrc.ucf | ADM-XRCII | reario\reario-xrc2.vhd | reario\reario-xrc2.ucf |