ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data


Simple sample VHDL FPGA design

VHDL source files

Source files required for supported cards

The Simple FPGA design demonstrates how to implement host-accessible registers in an FPGA design. The registers can be accessed via the ADMXRC2_Read and ADMXRC2_Write API calls, or via a memory-mapped region. The latter method is demonstrated by the Simple sample application. The Simple design works as follows:

Runs on

ADM-XRC, ADM-XRC-P, ADM-XRCII-Lite, ADM-XRCII, ADM-XRCIIPro-Lite

VHDL source files

Filename Description
simple\simple.vhd Top level of design (ADM-XRC, ADM-XRC-P, ADM-XRCII-Lite, ADM-XRCII only)
simple\simple-xrc2pl.vhd Top level of design (ADM-XRCIIPro-Lite only)
common\sdkcomp.vhd Package of common components used in sample designs
common\plxdssm.vhd Direct slave state machine module plxdssm for interfacing to local bus bridge

Source files required for supported cards (top level in bold)

Card Source files UCF file
ADM-XRC common\sdkcomp.vhd
common\plxdssm.vhd
simple\simple.vhd
simple\simple-xrc.ucf
ADM-XRC-P common\sdkcomp.vhd
common\plxdssm.vhd
simple\simple.vhd
simple\simple-xrcp.ucf
ADM-XRCII-L common\sdkcomp.vhd
common\plxdssm.vhd
simple\simple.vhd
simple\simple-xrc2l.ucf
ADM-XRCII common\sdkcomp.vhd
common\plxdssm.vhd
simple\simple.vhd
simple\simple-xrc2.ucf
ADM-XRCIIPro-Lite common\sdkcomp.vhd
common\plxdssm.vhd
simple\simple-xrc2pl.vhd
simple\simple-xrc2pl.ucf