ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data


Sample VHDL FPGA design list

The table below lists the sample FPGA designs and the sample applications that use them:

Design name Used by application(s) Purpose
DLL DLL Demonstrates clock doubling using Virtex DLLs and Virtex-II DCMs
DDMA DMA Demonstrates use of the PCI9080/PCI9656 DMA engines in demand-mode, with bursting on the local bus.
FrontIO FrontIO A trivial design that walks a '1' bit up the front panel I/O pins.
ITest ITest Sample logic for generating FPGA interrupts.
Master Master Demonstrates how to implement a direct master capability in an FPGA design.
RearIO RearIO A trivial design that walks a '1' bit up the rear panel I/O pins.
Simple Simple Demonstrates how to implement host-readable registers.
ZBT Memtest Demonstrates host access to the ZBT SSRAM,