ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data
Running the Xilinx tools
Tips for running the Xilinx tools
When building an FPGA bitstream that targets an ADM-XRC series card, certain options must be passed to the Xilinx tools:
Tool | Bitgen Option | Project Navigator Option | When to apply |
bitgen | -g drivedone:yes |
This option is accessible via the "Processes for Current Source" panel:
|
Always. |
bitgen | -g persist:yes |
This option is accessible via the "Processes for Current Source" panel:
|
If your application needs to access the FPGA's SelectMap port after configuration. |
map | -pr b |
This option is accessible via the "Processes for Current Source" panel:
|
If flip-flops should be automatically packed into IOBs. The SDK examples use this feature to improve IOB setup and clock-to-output delays. |
Tips for running the Xilinx tools
Device utilization summary: Number of External GCLKIOBs 1 out of 4 25% Number of External IOBs 45 out of 404 11% Number of LOCed External IOBs 45 out of 45 100% Number of SLICEs 2612 out of 6912 38% Number of GCLKs 1 out of 4 25% Number of TBUFs 320 out of 7104 5%Generally, "Number of LOCed External IOBs" should be 100%. If not, it implies that one or more IOBs will be placed on arbitrary pins, which may cause problems. The .PAD file, which is produced along with the routed .NCD file, can be used to find out which I/O signals do not have location constraints.