ITest sample application
Supports models:
- ADM-XRC
- ADM-XRC-P
- ADM-XRCII-Lite
- ADM-XRCII
- ADM-XRCIIPro-Lite
The ITest sample application demonstrates how to handle interrupts from the FPGA in an application. It makes use of the ITest sample FPGA design (Verilog, VHDL), which implements the interrupt scheme described in ADM-XRC Application Note 6 in the doc directory of this SDK. The application works as follows:
- An interrupt thread is started up. The interrupt thread waits for interrupts in a loop, using the ADMXRC2_WaitForInterrupt API call. Each an FPGA interrupt occurs, the interrupt thread wakes up and performs the following:
- Reads the ISTAT FPGA register to discover which of the 32 FPGA interrupts are pending.
- Clears all pending FPGA interrupts by writing to the ISTAT FPGA register.
- Rearms FPGA interrupts by writing a dummy value to the IARM FPGA register.
- Increments a count of FPGA interrupts received.
- Interrupts are enabled by writing to the IMASK FPGA register.
- When the user enters something other than 'q', the application causes the FPGA to generate an interrupt.
- When the user enters 'q', the application cleans up and displays the number of FPGA interrupts that it handled, which should be equal to the number of interrupts generated. The application then terminates.
Syntax:
itest [options ...]
Options:
Option |
Type |
Meaning |
-card |
base 10 integer |
ID of card to open |
-index |
base 10 integer |
Index of card to open |