ADM-XRC SDK 2.3.0 User Guide (Linux)
© Copyright 2001-2003 Alpha Data
DDMA sample Verilog FPGA design
Source files required for supported cards
The DDMA FPGA design demonstrates demand-mode DMA with bursting. Data is read from an application buffer in host memory and then simply written back to another application buffer unchanged (a 'loopback' operation). In order to use demand-mode DMA, the host must specify the appropriate mode when performing DMA transfers. This is demonstrated by the DMA sample application.
Runs on
ADM-XRC, ADM-XRC-P, ADM-XRCII-Lite, ADM-XRCII
Verilog source files
Filename | Description |
ddma\ddma.v | Top level of design |
common\xstboxes.v | "Black box" declarations required for synthesis with XST |
common\plxddsm.v | Demand-mode DMA state machine module plxddsm for interfacing to PCI9080/PCI9656 |
common\plxdssm.v | Direct slave state machine module plxdssm for interfacing to PCI9080/PCI9656 |
common\sfifo.v | Synchronous 512 word by 32 FIFO module SFIFO |
common\sfiforam_v.v | RAM module SFIFORAM for the SFIFO module, using Virtex/-E/-EM BlockRAMs |
common\sfiforam_v2.v | RAM module SFIFORAM for the SFIFO module, using Virtex-II BlockRAMs |
Source files required for supported cards (top level in bold)
Card | Source files | UCF file |
ADM-XRC | common\xstboxes.v common\plxddsm.v common\plxdssm.v common\sfifo.v common\sfiforam_v.v ddma\ddma.v |
ddma\ddma-xrc.ucf |
ADM-XRC-P | common\xstboxes.v common\plxddsm.v common\plxdssm.v common\sfifo.v common\sfiforam_v.v ddma\ddma.v |
ddma\ddma-xrcp.ucf |
ADM-XRCII-Lite | common\xstboxes.v common\plxddsm.v common\plxdssm.v common\sfifo.v common\sfiforam_v2.v ddma\ddma.v |
ddma\ddma-xrc2l.ucf |
ADM-XRCII | common\xstboxes.v common\plxddsm.v common\plxdssm.v common\sfifo.v common\sfiforam_v2.v ddma\ddma.v |
ddma\ddma-xrc2.ucf |