ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
component lbpcheck generic( multiplexed : in boolean; wide : in boolean); port( lclk : in std_logic; lreset_l : in std_logic; lads_l : in std_logic; l64_l : in std_logic; la : in std_logic_vector(31 downto 2); lad_lo : in std_logic_vector(31 downto 0); lad_hi : in std_logic_vector(63 downto 32); lbe_lo_l : in std_logic_vector(3 downto 0); lbe_hi_l : in std_logic_vector(7 downto 4); lwrite : in std_logic; lblast_l : in std_logic; lready_l : in std_logic; lbterm_l : in std_logic); end component;
Non-synthesizable testbench component that flags local bus protocol errors.
This component can be instantiated in a testbench to verify the local bus protocol. It is fully passive and cannot interfere with the operation of the local bus. The generics should be mapped as follows:
Generic | Map to... |
multiplexed |
|
wide |
|
The ports should be mapped to local bus signals as follows:
Port | Map to... |
lclk | The signal corresponding to LCLK in the testbench. |
lreset_l | The signal corresponding to LRESET# in the testbench. |
lads_l | The signal corresponding to LADS# in the testbench. |
l64_l |
|
la | |
lad_lo | |
lad_hi |
|
lbe_lo_l | The signal corresponding to LBE#[3:0] in the testbench. |
lbe_hi_l |
|
lwrite | The signal corresponding to LWRITE in the testbench. |
lblast_l | The signal corresponding to LBLAST# in the testbench. |
lready_l | The signal corresponding to LREADY# in the testbench. |
lbterm_l | The signal corresponding to LBTERM# in the testbench. |