ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
Prototype
ADMXRC2_STATUS ADMXRC2_SetClockRate( ADMXRC2_HANDLE Card, unsigned int Index, double Rate, double* Actual);
Arguments
Argument | Type | Purpose |
Card | In | Handle of card for which to program the clock |
Index | In | The index of the clock generator to program |
Rate | In | The desired frequency |
Actual | Out | The actual frequency programmed |
Return value
Value | Meaning |
ADMXRC2_SUCCESS | The clock generator was successfully programmed |
ADMXRC2_INVALID_HANDLE | The Card handle was not valid |
ADMXRC2_INVALID_PARAMETER | The Index or Rate parameters were out of range |
Description
This function programs a clock generator on a card to output the specified frequency.
The Index parameter is a zero-based index that specifies which clock generator to program. A value of 0 or ADMXRC2_CLOCK_LCLK refers to the local bus clock. The number of programmable clock generators on a card can be obtained from the NumClock member in the ADMXRC2_CARD_INFO structure. The maximum legal value of Index is (NumClock - 1)
The Rate parameter specifies the desired clock frequency, in Hz. This frequency should be within the limits specified in the table below, and also within the limits imposed by any bitstream that has been loaded into the FPGA.
The Actual parameter may either be NULL, or point to a variable of type double that is to receive the actual clock frequency programmed (in Hz). Since a digitally programmable clock generator device is used, the actual frequency programmed may not be exactly the same as the desired frequency.
The clock generators on the various models in the ADM-XRC range are as follows:
Card | Clock index | Name | Range | Function |
ADM-XRC | 0 | LCLK | 400kHz-40MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADM-XRC-P | 0 | LCLK | 400kHz-40MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADM-XRC-II-Lite | 0 | LCLK | 400kHz-40MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADM-XRC-II | 0 | LCLK | 400kHz-66MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADM-XPL | 0 | LCLK | 6MHz-80MHz See note 1 below. |
Local bus clock Note that MCLK = 2 * LCLK |
ADM-XP | 0 | LCLK | 6MHz-80MHz | Local bus clock Note that MCLK = 2 * LCLK |
ADP-WRC-II | 0 | LCLK | 400kHz-66MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADP-DRC-II | 0 | LCLK | 400kHz-66MHz | Local bus clock |
1 | MCLK | 400kHz-100MHz | General purpose | |
ADP-XPI | 0 | LCLK | 6MHz-80MHz | Local bus clock Note that MCLK = 2 * LCLK |
ADM-XRC-4LX | 0 | LCLK | 400kHz-66MHz | Local bus clock |
1 | MCLK | 33MHz-500MHz | General purpose | |
ADM-XRC-4SX | 0 | LCLK | 400kHz-66MHz | Local bus clock |
1 | MCLK | 33MHz-500MHz | General purpose | |
ADM-XRC-4FX | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose | |
ADPE-XRC-4FX | 0 | LCLK | 6MHz-80MHz | Local bus clock |
1 | MCLK | 33MHz-500MHz | General purpose | |
ADM-XRC-5LX | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 33MHz-500MHz | General purpose | |
ADM-XRC-5T1 | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose | |
ADM-XRC-5T2 | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose | |
ADM-XRC-5T2-ADV | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose | |
ADM-XRC-5TZ | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose | |
ADM-XRC-5T-DA1 | 0 | LCLK | 32MHz-80MHz | Local bus clock |
1 | MCLK | 31MHz-640MHz | General purpose |
Note 1: If logic revision from INFO utility is 1.2 or greater, maximum LCLK frequency is 80MHz; otherwise 66.67MHz.