ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
plxsim is a package of HDL datatypes, constants, functions, procedures and components designed to speed up development of a testbench centered around the local bus interface of an FPGA design. It is currently implemented only for VHDL-93 or later, but a Verilog-2001 version is on the roadmap. PLXSIM provides:
Some example testbenches are provided with the sample FPGA designs. Example Modelsim scripts that compile and run these testbenches are also provided. Please refer to the documentation for the individual sample FPGA designs for details.
A simple testbench using the plxsim package consists of the unit under test (the FPGA design), a stimulus process, a local bus agent and the arbiter. The following figure illustrates this:
Here, the stimulus process might represent the Host CPU performing Direct Slave reads and writes of the FPGA. This process is not provided by the plxsim package; rather it must be written by the user of the plxsim package in order to drive the local bus agent. The stimulus process uses the procedures provided by the plxsim package and this enables it to be written in a logical, procedural way.
The local bus agent is a component provided by the plxsim package. There are several types of local bus agent. For example, a simulation targetting the ADM-XRC-II card requires the locbus_agent_nonmux agent, while a simulation targetting the ADM-XPL requires the locbus_agent_mux32 agent or the locbus_agent_mux64 agent depending on whether your design expects a 32 bit or 64 bit local bus. The purpose of a local bus agent is threefold:
Note the signals connecting the stimulus process to the local bus agent; there are four types: locbus_ddma_in_t, locbus_ddma_out_t, locbus_in_t and locbus_out_t. These are in fact bundles of signals that enable the stimulus process to drive the local bus agent.
The arbiter is another component provided by the plxsim package. Its job is to ensure that no more than one local bus agent drives the local bus at a given moment. Since there is only one local bus agent in the above example, the arbiter's job is trivial. However, the next example (see below) shows multiple local bus agents connected to the local bus.
The Simple sample FPGA design includes a testbench that works in the manner described above.
Sometimes, it is necessary to simulate multiple threads of execution that access the FPGA. For example, there may be two stimulus processes representing the DMA channels built into the PCI interface of an ADM-XRC series card, and one stimulus process representing the Host CPU, for a total of three threads. This arrangement is illustrated by the following figure:
Demand-DMA agents, which are instances of a component provided by the plxsim package, are optional and are used when a stimulus process must perform demand-mode DMA transfers on the local bus. Generally, there is one demand-DMA agent per DMA channel that is used in demand-mode by the FPGA design. An FPGA design that does not use demand-mode DMA need not include any demand-DMA agents.
This multithreaded approach is demonstrated by the testbench for the DDMA sample FPGA design.