ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data


PLXSIM VHDL reference - lbpcheck

Declaration

Synopsis

Description

Declaration
component lbpcheck
    generic(
        multiplexed   : in    boolean;
        wide          : in    boolean);
    port(
        lclk          : in    std_logic;
        lreset_l      : in    std_logic;
        lads_l        : in    std_logic;
        l64_l         : in    std_logic;
        la            : in    std_logic_vector(31 downto 2);
        lad_lo        : in    std_logic_vector(31 downto 0);
        lad_hi        : in    std_logic_vector(63 downto 32);
        lbe_lo_l      : in    std_logic_vector(3 downto 0);
        lbe_hi_l      : in    std_logic_vector(7 downto 4);
        lwrite        : in    std_logic;
        lblast_l      : in    std_logic;
        lready_l      : in    std_logic;
        lbterm_l      : in    std_logic);
end component;
Synopsis

Non-synthesizable testbench component that flags local bus protocol errors.

Description

This component can be instantiated in a testbench to verify the local bus protocol. It is fully passive and cannot interfere with the operation of the local bus. The generics should be mapped as follows:

Generic Map to...
multiplexed
  • true if the local bus has multiplexed address/data
  • false if the local bus has nonmultiplexed address/data.
wide
  • true if the local data bus is (up to) 64 bits wide
  • false if the local data bus is 32 bits wide.

The ports should be mapped to local bus signals as follows:

Port Map to...
lclk The signal corresponding to LCLK in the testbench.
lreset_l The signal corresponding to LRESET# in the testbench.
lads_l The signal corresponding to LADS# in the testbench.
l64_l
  • The signal corresponding to L64#, if the wide generic is true.
  • Anything, if the wide generic is false. The port will be ignored.
la
  • The signal corresponding to LA[31:2] in the testbench if the multiplexed generic is false.
  • The signal corresponding to LAD[31:2] in the testbench if the multiplexed generic is true.
lad_lo
  • The signal corresponding to LD[31:0] in the testbench if the multiplexed generic is false.
  • The signal corresponding to LAD[31:0] in the testbench if the multiplexed generic is true.
lad_hi
  • Anything, typically a vector of constant zeroes, if the wide generic is false. The port will be ignored.
  • The signal corresponding to LD[63:32] in the testbench if the wide generic is true and the multiplexed generic is false (note: currently no model in the ADM-XRC range supports such a configuration).
  • The signal corresponding to LAD[63:32] in the testbench if the wide generic is true and the multiplexed generic is true.
lbe_lo_l The signal corresponding to LBE#[3:0] in the testbench.
lbe_hi_l
  • Anything, typically a vector of constant zeroes, if the wide generic is false. The port will be ignored.
  • The signal corresponding to LBE#[7:4] in the testbench if the wide generic is true.
lwrite The signal corresponding to LWRITE in the testbench.
lblast_l The signal corresponding to LBLAST# in the testbench.
lready_l The signal corresponding to LREADY# in the testbench.
lbterm_l The signal corresponding to LBTERM# in the testbench.

 


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