ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data


LEOT mode DMA transfers

LEOT mode offers a way for the FPGA on an ADM-XRC series card to terminate a DMA transfer before the programmed number of bytes of data has been transferred. Normally, calls ADMXRC2_DoDMA and ADMXRC2_DoDMAImmediate do not return until the requested number of bytes has been transferred. In some applications, this is undesirable since an application may not know in advance how many bytes of data to transfer to or from the FPGA.

In LEOT mode, the FPGA can assert the LEOT# signal along with LREADY# and/or LBTERM# during a local bus burst, in order to prematurely terminate a DMA transfer. The DMA engine that is performing the current local bus burst will complete the burst as quickly as possible, and then terminate the DMA transfer. The status of the DMA transfer will be that it was completed without error, and the host will receive a DMA interrupt as normal (this DMA interrupt should not be confused with the FPGA interrupt). However, less than the programmed number of bytes will have been transferred.

LEOT mode may be freely mixed with the other DMA modes, such as constant address mode and demand mode.

In order for the host to know how many bytes of data were transferred, it is recommended that a host-readable register be implemented within the FPGA, indicating the number of bytes transferred. After the call to ADMXRC2_DoDMA and ADMXRC2_DoDMAImmediate returns, the host can inspect this register to determine how much data was transferred.

What happens to any data that might be remaining in a DMA engine's FIFOs when the DMA transfer is terminated using LEOT#? This depends upon the direction of the DMA transfer:

When a DMA transfer whose direction is PCI-to-local bus is terminated using LEOT#, there may be data remaining the inbound DMA FIFO for that DMA channel. This data is discarded.

To use LEOT mode:

This following topics illustrate the local bus protocol when LEOT mode is used:

LEOT#, not bursting

LEOT#, bursting

LEOT# and LBTERM#

LEOT# in nonburst transfer

In this example, LEOT# is asserted during a nonburst local bus cycle.

Note:

  1. In this example, since LBLAST# is asserted when LEOT# is asserted, the current local bus cycle ends immediately. When the cycle in which LEOT# is asserted ends, so does the DMA transfer.

LEOT# in burst transfer

In this example, LEOT# is asserted during a burst local bus cycle.

Note:

  1. When LEOT# is sampled asserted by the bridge, the bridge asserts LBLAST# and the current local bus cycle terminates, also ending the DMA transfer, after one extra word has been transferred.

LEOT# asserted with LBTERM#

In this example, LEOT# is asserted coincident with LBTERM# during a burst local bus cycle.

Note:

  1. In this example, LEOT# is sampled asserted by the bridge along with LBTERM#. Hence the current local bus cycle terminates immediately, also ending the DMA transfer. This is the simplest way to guarantee that no extra data is transferred after the assertion of LEOT#.

 


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