ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
Model | Supported |
ADM-XRC | ![]() |
ADM-XRC-P | |
ADM-XRC-II-Lite | ![]() |
ADM-XRC-II | ![]() |
ADM-XPL | |
ADM-XP | |
ADP-WRC-II | |
ADP-DRC-II | |
ADP-XPI | |
ADM-XRC-4LX | |
ADM-XRC-4SX | |
ADM-XRC-4FX | |
ADPE-XRC-4FX | |
ADM-XRC-5LX | |
ADM-XRC-5T1 | |
ADM-XRC-5T2 | |
ADM-XRC-5T2-ADV | |
ADM-XRC-5TZ | |
ADM-XRC-5T-DA1 |
The FrontIO sample application configures the target FPGA with a bitstream that outputs a walking '1' bit on the front panel I/O connector. As soon as the target FPGA has been configured with the bitstream, the application terminates.
frontio [options ...]
Option | Argument type | Meaning |
-card | base 10 integer | ID of card to open |
-index | base 10 integer | Index of card to open |
The FrontIO sample application uses the FrontIO sample design (Verilog, VHDL).