ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data


PLXSIM VHDL reference

Datatypes

Constants

Functions and procedures

Components

This section documents the VHDL implementation of the PLXSIM package. This package consists datatypes, constants, functions, procedures and components designed to speed up development of a VHDL testbench centered around the local bus interface of an FPGA design.

Datatypes

Name Purpose
byte_enable_t A vector type used to pass the byte enables for a local bus transfer
byte_t A type that can hold a single byte of data
byte_vector_t A vector type used to hold the data for a local bus transfer
integer_vector_t A vector type used to hold an array of integers
locbus_ddma_in_t A record type used to make a bundle of the demand-mode DMA signals for a particular DMA channel that are input by a stimulus process
locbus_ddma_out_t A record type used to make a bundle of the demand-mode DMA signals for a particular DMA channel that are driven by a stimulus process
locbus_in_t A record type used to make a bundle of the local bus signals that are input by a stimulus process
locbus_out_t A record type used to make a bundle of the local bus signals that are driven by a stimulus process

Constants

Name Purpose
init_locbus_ddma_out A constant that can be used to initialize variables/signals of type locbus_ddma_out_t
init_locbus_out A constant that can be used to initialize variables/signals of type locbus_out_t

Functions and procedures

Name Purpose
conv_byte_vector A function for converting values to the byte_vector_t type
conv_integer A function for converting values to the integer type
conv_integer_signed A function for converting signed binary values to the integer type
conv_integer_unsigned A function for converting unsigned binary values to the integer type
conv_std_logic_vector A function for converting values to the std_logic_vector type
conv_string A function for converting values to the string type
conv_string_hex A function for converting values to the string type, in hexadecimal form
plxsim_read A procedure for performing a basic read transfer on the local bus
plxsim_read_const A procedure for performing a basic read transfer with constant local address on the local bus
plxsim_read_const_demand A procedure for performing a basic demand-mode DMA read transfer with constant local address on the local bus
plxsim_read_demand A procedure for performing a basic demand-mode DMA read transfer on the local bus
plxsim_request_bus A procedure for requesting or relinquishing access to the local bus
plxsim_wait_cycles A procedure for delaying execution for a particular number of local bus clock cycles
plxsim_wait_demand A procedure for waiting until the FPGA requests a demand-mode DMA transfer
plxsim_write A procedure for performing a basic write transfer on the local bus
plxsim_write_const A procedure for performing a basic write transfer with constant local address on the local bus
plxsim_write_const_demand A procedure for performing a basic demand-mode DMA write transfer with constant local address on the local bus
plxsim_write_demand A procedure for performing a basic demand-mode DMA write transfer on the local bus

Components

Name Purpose
lbpcheck A component that can be instantiated in a testbench in order to flag local bus protocol violations
locbus_agent_ddma A component that can be instantiated in order to connect a stimulus process to the demand-mode DMA signals for a particular DMA channel
locbus_agent_mux32 A component that can be instantiated in order to connect a stimulus process to a 32-bit multiplexed address/data local bus
locbus_agent_mux64 A component that can be instantiated in order to connect a stimulus process to a 64-bit multiplexed address/data local bus
locbus_agent_nonmux A component that can be instantiated in order to connect a stimulus process to a 32-bit nonmultiplexed address/data local bus
locbus_arb A component that can be instantiated in order to arbitrate between stimulus processes for local bus access

 


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