ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
Model | Supported |
ADM-XRC | ![]() |
ADM-XRC-P | ![]() |
ADM-XRC-II-Lite | ![]() |
ADM-XRC-II | ![]() |
ADM-XPL | ![]() |
ADM-XP | |
ADP-WRC-II | |
ADP-DRC-II | |
ADP-XPI | |
ADM-XRC-4LX | ![]() |
ADM-XRC-4SX | ![]() |
ADM-XRC-4FX | |
ADPE-XRC-4FX | |
ADM-XRC-5LX | |
ADM-XRC-5T1 | |
ADM-XRC-5T2 | |
ADM-XRC-5T2-ADV | |
ADM-XRC-5TZ | |
ADM-XRC-5T-DA1 |
Note: this application has been effectively superseded by the Memory sample application, since the latter is more general and works on a larger number of models.
The Memtest sample application tests the ZBT SSRAM on a reconfigurable computing card.
memtest [options ...]
Option | Type | Meaning |
-banks | hexadecimal integer | Bitmask of banks to test (default 0xFFFFFFFF) |
-card | base 10 integer | ID of card to open |
-index | base 10 integer | Index of card to open |
-lclk | real number | Local bus clock frequency to use, in MHz (default 33.0) |
-repeat | base 10 integer | Number of times to perform tests (default 1) |
-speed | Do not test SSRAM access speed | |
+speed | Test SSRAM access speed (default) | |
-usedma | Use programmed I/O for tests | |
+usedma | Use DMA for tests (default) | |
-64 | Operate local bus in 32 bit mode (default) | |
+64 | Operate local bus in 64 bit mode |
The Memtest sample application supports only models that use ZBT SSRAM memory. It tests the ZBT SSRAM memory in several phases:
Depending on whether the +usedma option or the +usedma option is specified on the command-line, Memtest uses either programmed I/O or DMA to transfer data to and from the ZBT SSRAM. DMA is efficient for bulk data transfers and hence the default is to use DMA transfers. However, because DMA transfers carry a certain set up overhead, programmed I/O is efficient for very small data transfers or random access to registers within the FPGA.
A subset of the memory banks on a card can be tested by passing a bitmask of banks to test via the -banks option. For example, -banks 0xD would specify that only banks 0, 2 and 3 should be tested.
The +64 option causes the application to operate the local bus in 64-bit mode. This is valid only for models that support a 64-bit local bus. Using the local bus in 64-bit mode increases the available bandwidth for data transfer, generally resulting in higher measured throughput in phase 6 (above).
The Memtest sample application normally uses the ZBT sample FPGA design (Verilog, VHDL), but when the +64 option is specified, it uses the ZBT64 sample FPGA design (Verilog, VHDL).