ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
The ddr2sram_pinout_t datatype is exported by the memif package, and is used to specify the physical configuration of an instance of ddr2sram_port.
It is a record type, defined as follows:
type ddr2sram_pinout_t is record family : family_t; has_c : boolean; has_cq : boolean; capture_180 : boolean; end record;
This datatype can normally treated as an abstract datatype, since the user application need typically only use one of the predefined constants of type ddr2sram_pinout_t. However, should it be necessary to create a new value, the members are defined as follows:
Member | Type | Function |
family | family_t | Specifies the FPGA family that the memory port targets. |
has_c | boolean | If true, the rc bus of the memory port includes the C / C# pins. |
has_cq | boolean | If true, the rc bus of the memory port includes the CQ / CQ# pins. |
capture_180 | boolean | If true, the memory port uses the clk180 clock phase to capture DQ for reads. If false, the memory port uses the clk90. |
The value of ddr2sram_pinout_t passed in the pinout parameter of a ddr2sram_port determines the proper value to pass for the rc_width parameter. The relevant formula is:
A = (rd_width / 8)
B = 2 if has_c else 0
C = 2 if has_cq else 0
rc_width = A + B + C + 5