ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
The table below lists the sample applications and the FPGA bitstream required for each, if applicable:
Name | FPGA design (Verilog) | FPGA design (VHDL) | Bitstream directory | Purpose |
Clock | Clock | bit/clock | Utility to program clock generators and measure clock frequencies. | |
DLL | DLL | DLL | bit/dll | Demonstrates using Delay-locked loops (DLLs) in Virtex/Virtex-E/Virtex-EM devices and Digital Clock Managers (DCMs) in Virtex-II, Virtex-IIPro, Virtex-4 and Virtex-5 devices. |
DMA | DDMA DDMA64 |
DDMA DDMA64 |
bit/ddma bit/ddma64 |
Demonstrates using the DMA engines on the ADM-XRC series of cards. |
EPTest | A utility to read and write the configuration EEPROM on the ADM-XRC series of cards. | |||
Flash | A utility for programming the Flash memory on the ADM-XRC. | |||
FrontIO | FrontIO | FrontIO | bit/frontio | Demonstrates use of the front panel I/O connector. |
Info | A utility to display information about a card. | |||
ITest | ITest | ITest | bit/itest | Demonstrates generation and handling of FPGA interrupts on the host. |
Master | Master | Master | bit/master | Demonstrates direct master access by FPGA to host memory. |
Memory | Memory Memory64 |
bit/memory bit/memory64 |
Demonstrates host access to memories | |
MemoryF | Memory Memory64 |
bit/memory bit/memory64 |
Demonstrates host access to memories | |
Memtest | ZBT ZBT64 |
ZBT ZBT64 |
bit/zbt bit/zbt64 |
Demonstrates host access to ZBT SSRAM. |
RearIO | RearIO | RearIO | bit/reario | Demonstrates use of the rear panel I/O connector. |
Simple | Simple Simple64 |
Simple Simple64 |
bit/simple bit/simple64 |
Demonstrates direct slave access by host to registers in the FPGA. |