ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data


The ddrsdram_pinout_t datatype

The memif_ddrsdram_pinout_t datatype is exported by the memif package, and is used to specify the physical configuration of an instance of ddrsdram_port.

It is a record type, defined as follows:

type ddrsdram_pinout_t is
record
    family        : family_t;
    flight_time   : natural;
    dqs_dq_delay  : boolean;
    dqs_dm_delay  : boolean;
    ck_width      : natural;
    cke_width     : natural;
    num_phys_bank : natural;
    num_bank_bits : natural;
    num_addr_bits : natural;
end record;

This datatype can normally treated as an abstract datatype, since the user application need typically only use one of the predefined constants of type ddrsdram_pinout_t. However, should it be necessary to create a new value, the members are defined as follows:

Member Type Function
family family_t Specifies the FPGA family that the memory port targets.
flight_time natural Round trip DQ delay in 1/4 clock cycles.
dqs_dq_delay boolean If true, specifies that DQS PCB traces have additional delay with respect to DQ PCB traces.
dqs_dm_delay boolean If true, specifies that DQS PCB traces have additional delay with respect to DM PCB traces.
ck_width natural Number of CK / CK# pairs present in the rc bus.
cke_width natural Number of CKE# pins present in the rc bus.
num_phys_bank natural Specifies the number of physical banks being driven by the memory port, which is also the number CS# pins present in the rc bus.
num_bank_bits natural Specifies the number of BA bits (internal bank bits) on the devices being driven by the memory port.
num_addr_bits natural Specifies the number of A bits (row / column address bank bits) on the devices being driven by the memory port.

The value of ddrsdram_pinout_t passed in the pinout parameter of a ddrsdram_port determines the proper values to pass for the ra_width and rc_width parameters. The relevant formulae are:

ra_width = num_bank_bits + num_addr_bits

rc_width = 2 * (rd_width / 8) + 2 * num_ck + cke_width + num_phys_bank + 3

 


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