ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
Model | Supported |
ADM-XRC | ![]() |
ADM-XRC-P | ![]() |
ADM-XRC-II-Lite | ![]() |
ADM-XRC-II | ![]() |
ADM-XPL | ![]() |
ADM-XP | ![]() |
ADP-WRC-II | ![]() |
ADP-DRC-II | ![]() |
ADP-XPI | |
ADM-XRC-4LX | |
ADM-XRC-4SX | |
ADM-XRC-4FX | |
ADPE-XRC-4FX | |
ADM-XRC-5LX | |
ADM-XRC-5T1 | |
ADM-XRC-5T2 / ADM-XRC-5T2-ADV | |
ADM-XRC-5TZ | |
ADM-XRC-5T-DA1 |
$ADMXRC_SDK4/fpga/verilog/itest
The ITest FPGA design implements logic for generating FPGA interrupts on the host. The scheme used is explained in application note AN-XRC06, which can be found in the doc/ directory of this SDK. The ITest sample application shows how to capture and handle FPGA interrupts on the host.
The design implements several registers for generating and acknowledging interrupts.
Interrupt Mask register (IMASK, local bus address 0x0) | |||
Bits | Mnemonic | Type | Function |
31:0 | MASK | R/W | Bit vector that unmasks or masks one of 32 interrupt sources in the FPGA. A '1' in a bit position masks (disables) the corresponding interrupt source. |
The IMASK register allows individual interrupt sources to be enabled (unmasked) or disabled (masked). A disabled (masked) interrupt source cannot generate a local bus interrupt via the FINTI# signal.
Interrupt Status register (ISTAT, local bus address 0x4) | |||
Bits | Mnemonic | Type | Function |
31:0 | STAT | R/W1C | When read, returns a bit vector that indicates which of the 32 interrupt
sources within the FPGA are active. A '1' in a particular bit position
indicates that the corresponding interrupt source is active. When written, a '1' in a particular bit position sets the corresponding interrupt source to inactive. |
The ISTAT register indicates which of 32 interrupt sources in the FPGA are active. If an interrupt is active, a '1' will be read in the corresponding bit position of ISTAT, regardless of whether it is enabled or disabled via IMASK. Writing to a '1' to a particular bit position sets the corresponding interrupt to inactive.
Interrupt Arm register (IARM, local bus address 0x8) | |||
Bits | Mnemonic | Type | Function |
31:0 | n/a | WO | Writing to this register forces the FINTI# signal high for one clock cycle. |
The IARM register must be used to 'rearm' the edge-sensitive FINTI# signal. Writing to IARM forces FINTI# high for one cycle. Consider the following sequence of events:
Unfortunately, the host did not see interrupt source 1 become active. As far as it is concerned, no more interrupts have arrived; yet interrupt source 1 is now active and will not be handled, as FINTI# is still low. Note that FINTI# is an edge-triggered signal. The solution is simply for the host's interrupt handler to write to IARM just before exiting:
At this point, the host will be interrupted again, and notice that interrupt source 1 is active.
Interrupt Test register (TEST, local bus address 0xC) | |||
Bits | Mnemonic | Type | Function |
31:0 | TEST | WO | Writing a 1 to a particular bit of this register makes the corresponding interrupt source active. |
The TEST register can be used to test the interrupt handler on the host. By writing a 1 to a particular bit position, the corresponding interrupt source is set active.
Count register (COUNT, local bus address 0x10) | |||
Bits | Mnemonic | Type | Function |
31:0 | NCYCLE | R/W | This register counts local bus clock (LCLK) cycles when ISTAT[0] is '1'. When ISTAT[0] is '0', it may be written in order to initialize its value. |
The COUNT register can be used to measure interrupt response time. It can be initialized to zero when ISTAT[0] is '0', and increments when ISTAT[0] is '1'.
For a list of the Verilog source files, refer to the appropriate XST project file, as referenced in the following table:
Model | XST script file | XST project file | UCF file |
ADM-XRC with Virtex | itest-xrc-v.scr | itest-xrc-v.prj | itest-xrc.ucf |
ADM-XRC with Virtex-E | itest-xrc-ve.scr | itest-xrc-ve.prj | itest-xrc.ucf |
ADM-XRC-P with Virtex | itest-xrcp-v.scr | itest-xrcp-v.prj | itest-xrcp.ucf |
ADM-XRC-P with Virtex-E | itest-xrcp-ve.scr | itest-xrcp-ve.prj | itest-xrcp.ucf |
ADM-XRC-II-Lite | itest-xrc2l-v2.scr | itest-xrc2l-v2.prj | itest-xrc2l.ucf |
ADM-XRC-II | itest-xrc2-v2.scr | itest-xrc2-v2.prj | itest-xrc2.ucf |
ADM-XPL | itest-xpl-v2p.scr | itest-xpl-v2p.prj | itest-xpl.ucf |
ADM-XP | itest-xp-v2p.scr | itest-xp-v2p.prj | itest-xp.ucf |
ADP-WRC-II | itest-wrc2-v2.scr | itest-wrc2-v2.prj | itest-wrc2.ucf |
ADP-DRC-II | itest-drc2-v2.scr | itest-drc2-v2.prj | itest-drc2.ucf |
Project Navigator projects can be found in the projnav directory as follows:
Model | Project Navigator project file |
ADM-XRC | projnav/xrc/<device> |
ADM-XRC-P | projnav/xrcp/<device> |
ADM-XRC-II-Lite | projnav/xrc2l/<device> |
ADM-XRC-II | projnav/xrc2/<device> |
ADM-XPL | projnav/xpl/<device> |
ADM-XP | projnav/xp/<device> |
ADP-WRC-II | projnav/wrc2/<device> |
ADP-DRC-II | projnav/drc2/<device> |