ADM-XRC SDK 2.8.1 User Guide (Linux)
© Copyright 2001-2009 Alpha Data
Model | Supported |
ADM-XRC | ![]() |
ADM-XRC-P | ![]() |
ADM-XRC-II-Lite | ![]() |
ADM-XRC-II | ![]() |
ADM-XPL | |
ADM-XP | |
ADP-WRC-II | |
ADP-DRC-II | |
ADP-XPI | |
ADM-XRC-4LX | |
ADM-XRC-4SX | |
ADM-XRC-4FX | |
ADPE-XRC-4FX | |
ADM-XRC-5LX | |
ADM-XRC-5T1 | |
ADM-XRC-5T2 | |
ADM-XRC-5T2-ADV | |
ADM-XRC-5TZ | |
ADM-XRC-5T-DA1 |
The Master sample application demonstrates access to host memory by the target FPGA using direct master cycles.
master [options ...]
Option | Type | Meaning |
-card | base 10 integer | ID of card to open |
-index | base 10 integer | Index of card to open |
On startup, the application allocates a user-space buffer, and calls ADMXRC2_SetupDMA to lock it in memory. It then obtains a scatter-gather map of the buffer, by calling ADMXRC2_MapDirectMaster. It initializes the user-space buffer to contain known data, and then waits for the user to enter commands, which can be the following:
The Master sample application makes use of the Master sample FPGA design (Verilog, VHDL).